
Data Sheet
DAC8412/DAC8413
Rev. G | Page 11 of 20
–580ns
10V
TRIG'D
0V
1s/DIV
9.42s
1V/DIV
EA
VDD = +15V
VSS = –15V
VREFH = +10V
VREFL = –10V
TA = 25°C
00
27
4-
02
6
Figure 22. Positive Slew Rate
–1.96s
15.5mV
2mV/DIV
TRIG'D
–4.5mV
2s/DIV
0
INPUT
–5V
5V/DIV
18.04s
VDD = +15V
VSS = –15V
VREFH = +10V
VREFL = –10V
TA = 25°C
0
027
4-
0
25
Figure 23. Settling Time (Negative)
VDD = +15V
VSS = –15V
VREFH = +10V
VREFL = –10V
TA = 25°C
–1.96s
32.5mV
5mV/DIV
TRIG'D
–17.5mV
2s/DIV
5V
INPUT
0
5V/DIV
18.04s
1 LSB ERROR BAND
00
27
4-
0
24
Figure 24. Settling Time (Positive)
–580ns
10V
TRIG'D
0V
1s/DIV
9.42s
1V/DIV
EA
VDD = +15V
VSS = –15V
VREFH = +10V
VREFL = –10V
TA = 25°C
00
27
4-
0
27
Figure 25. Negative Slew Rate
2.0
0.5
1.5
–0.5
1.0
0
I VR
EF
H
(m
A
)
DIGITAL INPUT CODE (Decimal)
511
1023
1535
2047
2559
3071
3583
4095
0
VDD = +15V
VSS = –15V
VREFH = +10V
VREFL = –10V
TA = 25°C
00
27
4-
0
23
Figure 26. IVREFH vs. Code
0.6
1.0
IN
L
(
L
S
B
)
LOAD RESISTANCE (k)
0.8
0.4
0.2
0
–0.2
0.01
0.1
1
10
100
VDD = +15V
VSS = –15V
VREFH = +10V
VREFL = –10V
TA = 25°C
00
27
4-
0
28
Figure 27. INL vs. Load Resistance